4.6 A 144Kb Annealing System Composed of 9× 16Kb Annealing Processor Chips with Scalable Chip-to-Chip Connections for Large-Scale Combinatorial Optimization Problems.
Takashi TakemotoKasho YamamotoChihiro YoshimuraMasato HayashiMasafumi TadaHiroaki SaitoMayumi MashimoMasanao YamaokaPublished in: ISSCC (2021)
Keyphrases
- combinatorial optimization problems
- high speed
- simulated annealing
- chip design
- metaheuristic
- combinatorial optimization
- high density
- single chip
- knowledge base
- ibm zenterprise
- optimization problems
- knapsack problem
- low cost
- ant colony optimization
- functional verification
- discrete optimization
- traveling salesman problem
- processor core
- job shop scheduling
- ibm power processor
- random access memory
- shortest path problem
- low power
- evolutionary algorithm
- continuous optimization problems
- multithreading
- physical design
- job shop scheduling problem
- low latency
- digital signal processors
- cmos technology
- memory access
- search strategy
- tabu search