Performance evaluation of nano-On-Chip Interconnect for SoCs.

O. Yalgashev Mohamed Bakhouya Abderrahim Chariete Jaafar Gaber

Published in: HPCS (2014)

Keyphrases

high speed
power dissipation
nano scale
low power
low cost
high density
power consumption
physical design
analog vlsi
atomic force microscopy
image processing
host computer
chip design
single chip
circuit design
cmos technology
electron microscopy
real time
parallel processing
case study
data sets