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Graph-Based Sparsification and Synthesis of Dense Matrices in the Reduction of RLC Circuits.
Charalampos Antoniadis
Nestor E. Evmorfopoulos
Georgios I. Stamoulis
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2021)
Keyphrases
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logic synthesis
analog circuits
program synthesis
high speed
digital circuits
fault diagnosis
graph model
analog vlsi
neural network
singular values
coefficient matrix
tunnel diode