Design Methodologies for Ternary Logic Circuits.

Chetan Vudadha M. B. Srinivas

Published in: ISMVL (2018)

Keyphrases

logic circuits
design methodologies
design methodology
low power
multiagent systems
functional decomposition
design process
gate array
real world
high speed
logic synthesis
power consumption
formal specification
power dissipation
tunnel diode