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Integrated approach to area-time tradeoff for built-in-self-test in VLSI circuits.

Anupam BasuThomas Charles WilsonDilip K. BanerjiJayanti C. Majithia
Published in: Great Lakes Symposium on VLSI (1991)
Keyphrases
  • vlsi circuits
  • low power
  • built in self test
  • mixed signal
  • computational complexity
  • trade off
  • multi channel
  • genetic algorithm
  • relational databases
  • high speed