An Automated Temporal Partitioning and Loop Fission Approach for FPGA Based Reconfigurable Synthesis of DSP Applications.
Meenakshi KaulRanga VemuriSriram GovindarajanIyad OuaissPublished in: DAC (1999)
Keyphrases
- field programmable gate array
- hardware implementation
- digital signal processing
- systolic array
- digital signal
- smart camera
- temporal data
- signal processing
- reconfigurable architecture
- temporal constraints
- temporal information
- temporal patterns
- low cost
- general purpose
- temporal reasoning
- partitioning algorithm
- spatio temporal
- spatial and temporal
- digital signal processor
- semi automated
- video processing
- fully automated
- computer aided
- temporal consistency
- texture synthesis
- temporal dimension
- low power
- efficient implementation
- hardware design
- graph partitioning
- hardware architecture
- temporal databases
- parallel computing
- computer vision
- application specific
- multi objective evolutionary
- clustering algorithm