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Embedded DRAM built in self test and methodology for test insertion.

Peter JakobsenJeffrey H. DreibelbisGary PomichterDarren AnandJohn BarthMichael R. NelmsJeffrey LeachGeorge M. Belansek
Published in: ITC (2001)
Keyphrases
  • built in self test
  • integrated circuit
  • high speed