A 128Gb/s 1.3pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14nm CMOS.
Zeynep Toprak DenizJonathan E. ProeselJohn F. BulzacchelliHerschel A. AinspanTimothy O. DicksonMichael P. BeakesMounir MeghelliPublished in: ISSCC (2019)
Keyphrases
- power supply
- low cost
- high speed
- metal oxide semiconductor
- cmos technology
- silicon on insulator
- low power
- nm technology
- power consumption
- power reduction
- reconfigurable architecture
- hardware implementation
- floating gate
- parallel processing
- low voltage
- multi objective evolutionary
- systolic array
- general purpose
- real time
- single chip
- circuit design
- intelligent control
- analog vlsi
- integrated circuit
- hardware and software
- delay insensitive
- digital signal
- field programmable gate array
- communication systems
- neural network