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Challenges in gate level modeling for delay and SI at 65nm and below.

Igor KellerKing Ho TamVinod Kariat
Published in: DAC (2008)
Keyphrases
  • leakage current
  • levels of abstraction
  • lessons learned
  • databases
  • database
  • real world
  • data mining
  • three dimensional
  • technical challenges
  • modeling framework
  • open issues
  • silicon dioxide
  • metal oxide