On-Chip Memory Optimization of High Efficiency Accelerator for Deep Convolutional Neural Networks.
Tzu-Yi LaiKuan-Hung ChenPublished in: ISOCC (2018)
Keyphrases
- high efficiency
- convolutional neural networks
- memory space
- high accuracy
- real and synthetic datasets
- memory requirements
- low cost
- computational power
- optimization method
- physical design
- optimization problems
- optimization algorithm
- random access memory
- analog vlsi
- compute intensive
- memory subsystem
- arbitrary shape
- high density
- density based clustering
- result quality
- vlsi implementation
- evolutionary algorithm
- convolutional network