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ESD Protection Design for Mixed-Voltage I/O Circuit with Substrate-Triggered Technique in Sub-Quarter-Micron CMOS Process.

Ming-Dou KerChien-Hui ChuangKuo-Chun HsuWen-Yu Lo
Published in: ISQED (2002)
Keyphrases
  • circuit design
  • neural network
  • design process
  • information security
  • design methodology
  • design tools
  • digital circuits
  • evolvable hardware
  • low voltage
  • electronic circuits