Path Delay Fault Testing of a Class of Circuit-Switched Multistage Interconnection Networks.

Maciej Bellos Dimitris Nikolos Haridimos T. Vergos

Published in: EDCC (1999)

Keyphrases

multistage
interconnection networks
switched networks
single stage
stochastic programming
dynamic programming
fault tolerant
parallel algorithm
lot sizing
routing algorithm
shortest path
lot streaming
message passing
computer systems
optimal policy
reinforcement learning
image segmentation