Login / Signup
High Speed Parallel-Prefix Modulo 2n+1 Adders for Diminished-One Operands.
Haridimos T. Vergos
Dimitris Nikolos
Costas Efstathiou
Published in:
IEEE Symposium on Computer Arithmetic (2001)
Keyphrases
</>
high speed
bit parallel
pattern matching
low power
real time
regular expressions
parallel implementation
high speed networks
data structure
parallel processing
parallel hardware
databases
query processing
parallel computation
parallel programming