Testing of Asynchronous NULL Conventional Logic (NCL) Circuits in Synchronous-Based Design.

Waleed K. Al-Assadi Sindhu Kakarla

Published in: DFT (2007)

Keyphrases

high level synthesis
digital circuits
delay insensitive
logic circuits
asynchronous circuits
logic synthesis
chip design
user interface
object oriented
computer aided
information systems
knowledge base
knowledge based systems
design process
test cases
built in self test