A high performance multi-port SRAM for low voltage shared memory systems in 32 nm CMOS.
Samira AtaeiMatthew GaalswykJames E. StinePublished in: MWSCAS (2017)
Keyphrases
- low voltage
- shared memory
- cmos technology
- power consumption
- leakage current
- random access memory
- design considerations
- parallel algorithm
- power line
- distributed memory
- low power
- heterogeneous platforms
- parallel computers
- parallel computing
- embedded dram
- image processing
- power management
- message passing
- parallel architectures
- parallel processing
- data center
- computer systems