A reliable fault detection scheme for the AES hardware implementation.
Mouna BedouiHassen MestiriBelgacem BouallegueMohsen MachhoutPublished in: ISIVC (2016)
Keyphrases
- hardware implementation
- detection scheme
- fault model
- signal processing
- software implementation
- efficient implementation
- fpga implementation
- dedicated hardware
- fault detection
- fault diagnosis
- field programmable gate array
- hardware architecture
- image processing algorithms
- hardware design
- low cost
- parallel architecture
- memory management
- image binarization
- secret key
- advanced encryption standard
- fpga technology
- data mining
- pipeline architecture
- encryption algorithm
- data streams
- feature extraction