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Evaluation of a Field-Programmable VLSI Based on an Asynchronous Bit-Serial Architecture.
Masanori Hariyama
Shota Ishihara
Michitaka Kameyama
Published in:
IEICE Trans. Electron. (2008)
Keyphrases
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processor array
neural network
real time
network architecture
signal processing
genetic algorithm
database
management system
parallel algorithm
software architecture
information retrieval
evaluation methods
single chip
parallel computers
vlsi implementation
asynchronous circuits
vlsi design