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A diagnosis method for single logic design errors in gate-level combinational circuits.
Atsushi Yoshikawa
Seiji Kajihara
Masahiro Numa
Kozo Kinoshita
Published in:
Systems and Computers in Japan (1997)
Keyphrases
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preprocessing
high precision
experimental evaluation
high accuracy
synthetic data
classification method
case study
circuit design
cost function
computational cost
detection method
error accumulation
logic circuits
segmentation errors
evolutionary algorithm
pairwise
expert systems
image segmentation