Process Variation Tolerant FinFET Based Robust Low Power SRAM Cell Design at 32 nm Technology.
Balwinder RajJatin MitraDeepak Kumar BihaniV. RangharajanAshok K. SaxenaSudeb DasguptaPublished in: J. Low Power Electron. (2011)
Keyphrases
- low power
- nm technology
- power consumption
- low cost
- power dissipation
- single chip
- high speed
- low power consumption
- vlsi architecture
- cmos technology
- digital signal processing
- logic circuits
- gate array
- high power
- power reduction
- mixed signal
- vlsi circuits
- power saving
- design process
- wireless transmission
- power management
- real time
- case study
- image processing
- computer vision