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A 0.5-V 0.4-2.24-GHz Inductorless Phase-Locked Loop in a System-on-Chip.
Kuo-Hsing Cheng
Yu-Chang Tsai
Yu-Lung Lo
Jing-Shiuan Huang
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2011)
Keyphrases
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phase locked loop
power consumption
hardware and software
embedded systems
multipath
frequency band
hardware software partitioning
high voltage
high speed
design methodology
design space exploration
neural network
end to end
computational intelligence
multi band
dual band
feature vectors