A novel methodology for transistor-level power estimation.

Shi-Yu Huang Kwang-Ting Cheng Kuang-Chien Chen Mike Tien-Chien Lee

Published in: ISLPED (1996)

Keyphrases

high speed
levels of abstraction
power consumption
low power
design methodology
estimation accuracy
real time
neural network
real world
machine learning
information systems
probabilistic model
parameter estimation