Least-square estimation of average power in digital CMOS circuits.
Ashok K. MurugavelN. RanganathanRamamurti ChandramouliSrinath ChavaliPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2002)
Keyphrases
- circuit design
- least squares
- power consumption
- power dissipation
- chip design
- mixed signal
- analog vlsi
- low power
- high speed
- delay insensitive
- robust estimation
- vlsi circuits
- parameter estimation
- digital circuits
- low cost
- power management
- focal plane
- cmos technology
- logic circuits
- multi channel
- accurate estimation
- semi parametric
- power reduction
- estimation accuracy
- estimation algorithm
- metadata
- estimation error
- analog circuits
- low voltage
- steady state