Ultralow power processor employing block instruction for ECG applications.
Jing QiuXiaoyan XiangZhijian ChenJianyi MengYong DingPublished in: IEICE Electron. Express (2016)
Keyphrases
- instruction set
- ibm power processor
- level parallelism
- power consumption
- power distribution
- high speed
- multithreading
- multimedia
- computer architecture
- floating point
- memory subsystem
- parallel architecture
- parallel computing
- memory hierarchy
- multiprocessor systems
- block size
- ecg signals
- computational power
- cache misses
- signal processing
- functional verification