Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation - Part I: CNFET Transistor Optimization.
Rongmei ChenLin ChenJie LiangYuanqing ChengSouhir ElloumiJaehyun LeeKangwei XuVihar P. GeorgievKai NiPeter DebackerAsen AsenovAida Todri-SanialPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2022)