An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2\times$ Interpolating Sense-Amplifier-Latches.
Serdar A. YonarPier Andrea FranceseMatthias BrändliMarcel A. KosselMridula PrathapanThomas MorfAndrea RuffinoTaekwang JangPublished in: ISSCC (2023)