Formal Verification of Synthesized Mixed Signal Designs Using *BMDs.
Abhijit GhoshRanga VemuriPublished in: VLSI Design (2000)
Keyphrases
- formal verification
- mixed signal
- low power
- vlsi circuits
- multi channel
- model checking
- automated verification
- model checker
- power consumption
- bounded model checking
- high speed
- digital circuits
- low cost
- symbolic model checking
- program slicing
- cmos technology
- machine vision
- digital signal processing
- formal specification
- computer systems