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Delay hidden techniques based on configuration contexts reuse and differential reconfiguration in coarse-grained reconfigurable processor.
Haopeng Liu
Weiguang Sheng
Weifeng He
Zhigang Mao
Published in:
ASICON (2013)
Keyphrases
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coarse grained
fine grained
dynamic reconfiguration
multithreading
systolic array
digital signal
shared memory
parallel architecture
high level
low cost
protein sequences
functional units
hardware implementation
energy landscape
clock frequency
contact maps