Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown

Jonathan R. Carter Sule Ozev Daniel J. Sorin

Published in: CoRR (2007)

Keyphrases

leakage current
levels of abstraction
decision making
field effect transistors
low voltage
x ray
test set
multiple input
digital circuits
cmos technology
modeling method
mutual exclusion
design considerations
neural network
high speed
low cost
learning algorithm