Two phase clocked adiabatic static CMOS logic.
Nazrul AnuarYasuhiro TakahashiToshikazu SekinePublished in: SoC (2009)
Keyphrases
- low power
- delay insensitive
- power consumption
- low cost
- high speed
- logic programming
- modal logic
- random access memory
- chip design
- classical logic
- analog vlsi
- circuit design
- vlsi circuits
- single chip
- predicate logic
- defeasible logic
- asynchronous circuits
- digital circuits
- artificial intelligence
- cmos technology
- deontic logic
- set theory
- database
- logical framework
- digital camera