TSV Minimization for Circuit - Partitioned 3D SoC Test Wrapper Design.

Yuanqing Cheng Lei Zhang Yinhe Han Xiaowei Li

Published in: J. Comput. Sci. Technol. (2013)

Keyphrases

hardware software co design
hardware and software
computer aided
high speed
test cases
design decisions
test data
neural network
building blocks
case study
artificial intelligence
information extraction
expert systems
embedded systems
low power
feature selection
hw sw