Performance Measurement and Improvement of Asymmetric Three-Tr. Cell (ATC) DRAM toward 0.3V Memory Array Operation.
Motoi IchihashiHaruki TodaPublished in: VLSI Design (2006)
Keyphrases
- main memory
- random access memory
- embedded dram
- charge coupled devices
- memory requirements
- high density
- memory usage
- memory space
- dynamic random access memory
- significant improvement
- low voltage
- linear array
- data acquisition
- database management systems
- computing power
- external memory
- processing elements
- microscopy images
- memory size
- computational power
- management system