Hazard-Free Synthesis and Decomposition of Asynchronous Circuits.
Ren-Der ChenJer-Min JouYeu-Horng ShiauPublished in: ASP-DAC (1999)
Keyphrases
- asynchronous circuits
- functional decomposition
- delay insensitive
- process algebra
- model checking
- texture synthesis
- decomposition method
- information retrieval
- program synthesis
- risk assessment
- real time
- decomposition methods
- hierarchical decomposition
- low cost
- software engineering
- case study
- data mining
- neural network