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A Low Error, Hardware Efficient Logarithmic Multiplier.
L. Guna Sekhar Sai Harsha
Bhaskara Rao Jammu
Nalini Bodasingi
Sreehari Veeramachaneni
Noor Mohammad S.
Published in:
Circuits Syst. Signal Process. (2022)
Keyphrases
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low error
hardware implementation
database
real valued
data mining
lower bound