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A Low Error, Hardware Efficient Logarithmic Multiplier.

L. Guna Sekhar Sai HarshaBhaskara Rao JammuNalini BodasingiSreehari VeeramachaneniNoor Mohammad S.
Published in: Circuits Syst. Signal Process. (2022)
Keyphrases
  • low error
  • hardware implementation
  • database
  • real valued
  • data mining
  • lower bound