A 2000-MOPS embedded RISC processor with a Rambus DRAM controller.
Kazumasa SuzukiMasayuki DaitoTomoo InoueKouhei NadeharaMasahiro NomuraMasayuki MizunoTomofumi IimaShoichiro SatoTerumi FukudaTomohisa AraiIchiro KurodaMasakazu YamashinaPublished in: IEEE J. Solid State Circuits (1999)
Keyphrases
- dynamic random access memory
- instruction set
- memory subsystem
- embedded systems
- application specific
- ibm power processor
- floating point
- control system
- closed loop
- embedded processors
- micro controller
- control method
- high density
- high speed
- control scheme
- hardware architecture
- control algorithm
- real time
- fuzzy controller
- computation intensive