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An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures.
Iyad Ouaiss
Sriram Govindarajan
Vinoo Srinivasan
Meenakshi Kaul
Ranga Vemuri
Published in:
IPPS/SPDP Workshops (1998)
Keyphrases
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hardware implementation
program synthesis
low cost
high speed
artificial intelligence
decision trees
database systems
field programmable gate array
digital signal processors
databases
learning algorithm
artificial neural networks
signal processing
fpga implementation
parallel hardware