Testing of switch blocks in TSV-reduced Three-Dimensional FPGA.
Kouta MaebashiKazuteru NambaMasato KitakamiPublished in: DFTS (2013)
Keyphrases
- three dimensional
- high speed
- real time
- real time image processing
- fpga implementation
- variable size
- test cases
- hardware architecture
- virtual reality
- low cost
- image compression
- hardware implementation
- dedicated hardware
- database
- field programmable gate array
- data acquisition
- range images
- depth map
- image quality
- signal processing
- digital images
- image sequences