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A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist.

Yung-Wei LinHao-I YangMao-Chih HsiaYi-Wei LinChien-Hen ChenChing-Te ChuangWei HwangNan-Chun LienKuen-Di LeeWei-Chiang ShihYa-Ping WuWen-Ta LeeChih-Chiang Hsu
Published in: SoCC (2012)
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