Sample-hold circuit and stage circuits in a traditional 12-b 80-Msample/s pipelined A/D converter.
Xiang JiangJun ChengLiang LiTing ZhangLiao GongQiyun MaPublished in: ASICON (2015)
Keyphrases
- low voltage
- analog circuits
- circuit design
- electronic circuits
- tunnel diode
- delay insensitive
- high speed
- digital circuits
- analog vlsi
- logic circuits
- single phase
- logic synthesis
- output voltage
- cmos technology
- power dissipation
- chip design
- data flow
- power reduction
- vlsi circuits
- shift register
- asynchronous circuits
- parallel processing
- design considerations
- sample size
- control method
- control algorithm
- dc dc converter
- power electronics
- databases
- mixed signal
- fault diagnosis
- learning stage