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Fast and exact transistor sizing based on iterative relaxation.
Vijay Sundararajan
Sachin S. Sapatnekar
Keshab K. Parhi
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2002)
Keyphrases
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high speed
iterative algorithms
probabilistic relaxation
objective function
iterative optimization
low power
integrated circuit
iterative methods
brute force
power losses
data sets
iterative process
data driven
dynamic programming
expert systems
case study
computer vision
neural network