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Design space exploration of systolic realization of QR factorization on a runtime reconfigurable platform.
Prasenjit Biswas
Keshavan Varadarajan
Mythri Alle
S. K. Nandy
Ranjani Narayan
Published in:
ICSAMOS (2010)
Keyphrases
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design space exploration
systolic array
design space
singular value decomposition
parallel architecture
high level synthesis
computer architecture
design process
hardware implementation
reconfigurable hardware
low cost
hardware software partitioning
database systems
denoising
data processing