Codebook hardware implementation on FPGA for background subtraction.
Rafael Rodríguez-GómezEnrique J. Fernandez-SanchezJavier DíazEduardo Ros VidalPublished in: J. Real Time Image Process. (2015)
Keyphrases
- background subtraction
- hardware implementation
- field programmable gate array
- vector quantization
- hardware architecture
- video surveillance
- fpga implementation
- background model
- dedicated hardware
- object detection
- moving objects
- efficient implementation
- foreground objects
- software implementation
- signal processing
- image sequences
- motion detection
- fpga device
- gaussian mixture model
- bag of words
- traffic monitoring
- dynamic scenes
- feature vectors
- hardware design
- visual words
- image processing algorithms
- post processing
- background image
- appearance model
- foreground detection
- fpga technology
- parallel architecture
- image representation
- background modeling
- pipelined architecture
- pixel wise
- pixel level
- training set
- feature extraction