A high-speed subpixel edge detector implementation inside a FPGA.
Stephan HussmannThian H. HoPublished in: Real Time Imaging (2003)
Keyphrases
- high speed
- edge detector
- edge detection
- scale space
- gray level
- hardware implementation
- real time
- gradient vector
- figure of merit
- sar images
- edge map
- step edges
- edge detection algorithms
- region segmentation
- matching criterion
- signal to noise ratio
- noisy images
- low power
- zero crossing
- multiscale
- edge localization
- fpga technology
- reconfigurable hardware
- edge detection algorithm
- efficient implementation
- multiresolution
- image segmentation