BIST design optimization for large-scale embedded memory cores.
Tzuo-Fan ChienWen-Chi ChaoJames Chien-Mo LiYao-Wen ChangKuan-Yu LiaoMing-Tung ChangMin-Hsiu TsaiChih-Mou TsengPublished in: ICCAD (2009)
Keyphrases
- dynamic random access memory
- memory usage
- embedded systems
- memory space
- small scale
- memory size
- computational power
- databases
- memory requirements
- real life
- neural network
- general purpose
- operating system
- digital images
- data sets
- learning algorithm
- computing power
- random access
- machine learning
- limited memory
- low memory
- processor core