A chip-to-chip clock-deskewing circuit for 3-D ICs.

Ai-Jia Chuang Yu Lee Ching-Yuan Yang

Published in: ISCAS (2012)

Keyphrases

high speed
analog vlsi
circuit design
low cost
evolvable hardware
chip design
single chip
low power
high density
power dissipation
power consumption
physical design
cmos technology
real time
printed circuit boards
nm technology
micron cmos
mixed signal
programmable logic
signal processing
phase locked loop
data sets