Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor.
Saurabh DigheSriram R. VangalPaolo A. AseronShasi KumarTiju JacobKeith A. BowmanJason HowardJames W. TschanzVasantha ErraguntlaNitin BorkarVivek K. DeShekhar BorkarPublished in: IEEE J. Solid State Circuits (2011)
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