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Localized Layout Effect Related Reliability Approach in 8nm FinFETs Technology: From Transistor to Circuit.
Hai Jiang
Hyun-Chul Sagong
Jinju Kim
Junekyun Park
Sangchul Shin
Sangwoo Pae
Published in:
IRPS (2019)
Keyphrases
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metal oxide semiconductor
cmos technology
high speed
low power
power dissipation
nm technology
low cost
integrated circuit
circuit design
power consumption
rapid development
key technologies
highly reliable
cost effective
neural network
personal computer
image sensor
electron beam lithography
data processing