Wafer level encapsulated materials evaluation for chip on wafer (CoW) approach in 2.5D Si interposer integration.
Sylvain JoblotAlexis FarcyNicolas HotellierAmadine JouveFrançois de CrecyArnaud GarnierM. ArgoudC. FerrandonJ.-P. ColonnaR. FraniatteC. LavironSéverine CheramyPublished in: 3DIC (2013)
Keyphrases
- semiconductor manufacturing
- integrated circuit
- massively parallel
- high speed
- low cost
- higher level
- evaluation method
- modular design
- mechanical properties
- evaluation criteria
- host computer
- vlsi implementation
- physical design
- manufacturing process
- evaluation methods
- database
- data integration
- evolutionary algorithm
- database systems
- information retrieval
- databases