A Jitter Reduction Circuit Using Autocorrelation for Phase-Locked Loops and Serializer-Deserializer (SERDES) Circuits.
Hari Vijay VenkatanarayananMichael L. BushnellPublished in: VLSI Design (2008)
Keyphrases
- phase locked
- power reduction
- analog circuits
- circuit design
- high speed
- delay insensitive
- tunnel diode
- electronic circuits
- logic synthesis
- digital circuits
- analog vlsi
- logic circuits
- power dissipation
- low power
- power consumption
- vlsi circuits
- shift register
- higher order
- cmos technology
- low voltage
- asynchronous circuits
- data sets
- packet loss
- chip design
- non stationary
- reduction method
- information content
- neural network
- multi valued
- infrared
- clock gating