Low Cost Test Vector Compression/Decompression Scheme for Circuits with a Reconfigurable Serial Multiplier.
Avijit DuttaTerence RodriguesNur A. ToubaPublished in: ISVLSI (2005)
Keyphrases
- low cost
- compression ratio
- data compression
- image compression
- compression scheme
- compression rate
- compression algorithm
- hardware and software
- hardware implementation
- low power
- high compression ratio
- embedded systems
- compressed data
- compressed images
- image quality
- digital camera
- high speed
- progressive transmission
- test cases
- power reduction
- efficient compression
- analog circuits
- video compression
- digital circuits
- circuit design
- compressed domain
- reconstructed image
- multiscale
- visual quality