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Low-power state assignment targeting two- and multilevel logic implementations.
Chi-Ying Tsui
Massoud Pedram
Alvin M. Despain
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)
Keyphrases
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low power
high speed
power consumption
low cost
logic circuits
delay insensitive
vlsi circuits
single chip
wireless transmission
digital signal processing
low power consumption
cmos technology
high power
power reduction
digital circuits
vlsi architecture
low complexity
real time